Semiconductor Memories

8.1 General concepts
• Data storage capacity available on a single integrated circuit
grows exponentially being doubled approximately every two
years.
• Capacity of the dynamic read/write memory (DRAM) chip
exceeds now 1 Gigabit.
• Data transfer speed of a standard DRAM is at the level of
200Mb/sec/pin.
• Static and dynamic power consumption is of the order of
8–1
IC design 8.1. GENERAL CONCEPTS
Semiconductor Memories are classified according to the type of data
storage and the type of data access mechanism into the following two
main groups:
• Non-volatile Memory (NVM) also known as Read-Only Memory
(ROM) which retains information when the power supply voltage
is off. With respect to the data storage mechanism NVM are
divided into the following groups:
– Mask programmed ROM. The required contents of the
memory is programmed during fabrication,
– Programmable ROM (PROM). The required contents is
written in a permanent way by burning out internal
interconnections (fuses). It is a one-off procedure.
– Erasable PROM (EPROM). Data is stored as a charge on an
isolated gate capacitor (“floating gate”). Data is removed by
exposing the PROM to the ultraviolet light.
– Electrically Erasable PROM (EEPROM) also known as Flash
Memory. It is also base on the concept of the floating gate.
The contents can be re-programmed by applying a suitable
voltages to the EEPROM pins. The Flash Memories are very
important data storage devices for mobile applications.
• Read/Write (R/W) memory, also known as Random Access
Memory (RAM). From the point of view of the data storage
mechanism RAM are divided into two main groups:
– Static RAM, where data is retained as long as there is power
supply on.
– Dynamic RAM, where data is stored on capacitors and
requires a periodic refreshment.
A.P.Papli´nski 8–2 October 12, 2002
IC design 8.1. GENERAL CONCEPTS
Typical organization of a single chip semiconductor memory is shown
in Figure 8.1.
Figure 8.1: Typical...